HGS Fresher Recruitment of Technical Support Executive

Synopsys Invites Applications For The Role Of ASIC/Layout Design Engineers

Synopsys is at the forefront of Smart Everything with the world’s most advanced technologies for chip design, verification, IP integration, and software

Job Designation : ASIC/Layout Design Engineer

Qualification : Bachelor’s/ Master’s degree in Electrical  Engineering

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Skill Set :

  • Good grip over CMOS circuit layout fundamentals, Technology effects, IO frame design methodology, Analog matching concepts
  • Good understanding of layout and parasitic extraction.
  • Should have good grip over automation /scripting languages
  • Has a dedicated desire to learn and explore new technologies.
  • Demonstrates good analysis and problem-solving skills.
  • High energy person with the ability to go an extra mile.
  • A proactive team player with good written and verbal communication skills.
  • Networks with senior internal and external personnel in own area of understanding.

Job Description :

  • You will develop layouts designs for Analog Full Custom IPs such as
  • GPIOs , I2C, I3C , SMBUS , eMMC , SVID , Quad SPI , JTAG
  • High performance LVDS
  • Crystal Oscillators
  • Adaptive Bias Generator , Process Monitoring Block, Voltage Regulators
  • You will be working with experienced set of teams from various sites spread across globe.


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Gouri Saha
Gouri Saha

HR Intern at Epitome || MBA || Human Resources || Coordinator - Operation & IT Club, LPU

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